American
International
University-
Bangladesh

Students & Supervisors

Abstract

Quantum computing faces challenges such as noise, short coherence time, and limited qubit connectivity. These issues become more severe as quantum circuits grow in complexity, particularly due to increasing circuit depth. This research proposes an optimization framework aimed at reducing both depth and gate count in quantum circuits, specifically tailored for Noisy Intermediate-Scale Quantum (NISQ) devices. The proposed method integrates unitary merging of single-qubit gates, CNOT cancellation, gate commuting, and rotation gate rewriting strategies. Consecutive gates acting on the same qubit, such as Rx(θ1)·Rx(θ2) are algebraically combined into a single rotation, while redundant pairs of CNOT gates are removed using gate identity relations. The technique is implemented in Qiskit and evaluated on five diverse circuits, including complex, random, and multi-qubit configurations. Experimental results indicate an average depth reduction of 33.33% and a gate count reduction of 32.14%, along with runtime improvements of up to 25%. For example, a circuit with an initial depth of 7 and 11 gates was optimized to a depth of 2 with only 4 gates. All optimized circuits maintain functional correctness with fidelity F ≥ 0.99. High-resolution circuit diagrams visually illustrate the improvements before and after optimization. Additionally, global phase shifts such as e^{iπ/4} are preserved or analytically characterized where applicable. This work strengthens the practicality of quantum computations on near-term hardware and creates opportunities for future AI-driven quantum optimization techniques.

Keywords

Publication Details

• Type of Publication:
• Conference Name: IEEE Region 10 Conference 2025 (TENCON 2025)
• Date of Conference: 27/10/2025 - 27/10/2025
• Venue: Sabah International Convention Centre (SICC), Kota Kinabalu, Sabah, MALAYSIA
• Organizer: IEEE Malaysia Section